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ltc3522 1 3522fa typical application features applications description synchronous 400ma buck-boost and 200ma buck converters the ltc ? 3522 combines a 400ma buck-boost dc/dc con- verter with a 200ma synchronous buck dc/dc converter in a tiny 3mm 3mm package. the 1mhz switching frequency minimizes the solution footprint while maintaining high ef? ciency. both converters feature internal soft-start and compensation, simplifying the design process. the buck converter is current mode controlled and utilizes an internal synchronous recti? er for high ef? ciency. the buck converter supports 100% duty cycle operation to extend battery life. if the pwm pin is held low, the buck converter automatically transitions from burst mode opera- tion to pwm mode. with the pwm pin held high, the buck converter remains in low noise, 1mhz pwm mode. the buck-boost converter provides continuous conduc- tion operation to maximize ef? ciency and minimize noise. at light loads, the buck-boost converter can be placed in burst mode operation to improve ef? ciency and reduce no-load standby current. the ltc3522 provides a 1a shutdown mode, overtem- perature shutdown and current limit protection on both converters. the ltc3522 is available in a 16-pin low pro? le 3mm 3mm qfn package. dual high ef? ciency dc/dc converters: buck-boost (v out : 2.2v to 5.25v, i out : 400ma for v in > 3v, v out = 3.3v) buck (v out : 0.6v to v in , i out : 200ma) 2.4v to 5.5v input voltage range pin selectable burst mode ? operation 25a total quiescent current for both converters in burst mode operation independent power good indicator outputs integrated soft-start thermal and overcurrent protection <1a quiescent current in shutdown small 0.75mm 3mm 3mm qfn package flash-based mp3 players medical instruments digital cameras pdas, handheld pcs personal navigation devices , lt, ltc, ltm and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 6404251 and 6166527. + pv in1 pv in2 sw2 fb2 v out1 ltc3522 shdn2 1m 137k 68.1k l1: coilcraft mss6132-8.2 h l2: coilcraft mss6132-4.7 h 4.7 f 6.8 f 4.7 f 12pf li-ion l2 4.7 h l1 8.2 h v out1 3.3v 300ma (400ma v in > 3v) v out2 1.8v 200ma v in 2.4v to 4.2v 432k 3522 ta01a shdn1 pwm sw1a sw1b fb1 pgood2 pgood1 pgnd1 gnd pgnd2 on off pwm burst v in (v) 2.4 efficiency (%) 92 94 96 98 5.4 3522 ta01b 88 90 86 84 82 80 76 78 74 72 70 3.4 4.4 100 buck-boost i out = 100ma v out = 3.3v buck i out = 100ma v out = 1.8v ef? ciency vs v in
ltc3522 2 3522fa pin configuration electrical characteristics absolute maximum ratings pv in1 , pv in2 voltage .................................... ?0.3v to 6v sw1a, sw1b, sw2 voltage dc ............................................................ ?0.3v to 6v pulsed < 100ns ........................................... ?1v to 7v voltage, all other pins ................................. ?0.3v to 6v operating temperature range (note 2) ... ?40c to 85c maximum junction temperature (note 5) ............ 125c storage temperature range ................... ?65c to 125c (note 1) parameter conditions min typ max units input voltage 2.4 5.5 v quiescent current?shutdown v shdn shdn h shdnshdn h shdnshdn d d d d ss nss nss s n n ss s n n n n d d) =? = () ? = = = = ( )
ltc3522 3 3522fa note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc3522 is guaranteed to meet performance speci? cations from 0c to 85c. speci? cations over the C40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: current measurements are performed when the ltc3522 is not switching. the current limit values in operation will be somewhat higher due to the propagation delay of the comparators. parameter conditions min typ max units maximum duty cycle v fb2 = 0.54v 100 % minimum duty cycle v fb2 = 0.66v 0% pgood threshold v fb2 falling C11.3 C7.7 C4.1 % power good hysteresis 2.5 % buck-boost converter output voltage 2.2 5.25 v pmos switch resistance 0.29 nmos switch resistance 0.22 nmos switch leakage v sw1a = v sw1b = 5v, pv in1 = pv in2 = 5v 0.1 5 a pmos switch leakage v sw1a = v sw1b = 0v, pv in1 = pv in2 = 5v 0.1 10 a feedback voltage (note 4) 0.97 1 1.03 v feedback input current 150 na average current limit (note 3) 0.65 0.85 a burst mode current limit 230 340 ma reverse current limit (note 3) 250 ma maximum duty cycle v fb1 = 0.9v 70 80 % minimum duty cycle v fb1 = 1.1v 0% pgood threshold v fb1 falling C12 C10 C8 % power good hysteresis 2.5 % electrical characteristics the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. pv in1 = pv in2 = 3.6v, v out1 = 3.3v unless otherwise noted. note 4: the ltc3522 is tested in a proprietary non-switching test mode that connects each fb pin to the output of the respective error ampli? er. note 5: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the speci? ed maximum operating junction temperature may impair device reliability.
ltc3522 4 3522fa typical performance characteristics buck-boost ef? ciency, li-ion to 3.3v buck ef? ciency, li-ion to 2.5v buck ef? ciency, li-ion to 1.8v buck burst mode threshold buck switch r ds(0n) switching frequency vs temperature load current (ma) 1 0 efficiency (%) power loss (mw) 20 30 40 50 60 70 10 100 3522 g01 80 90 100 0 20 40 60 80 100 120 140 160 10 1000 burst mode operation burst mode power loss pwm mode v in = 4.2v v in = 2.7v l: coilcraft mss6132-4.7 h load current (ma) 1 0 efficiency (%) power loss (mw) 20 30 40 50 60 70 10 100 3522 g02 80 90 100 0 20 40 80 60 100 120 140 160 10 1000 v in = 3.7v v in = 4.2v burst mode operation burst mode power loss pwm mode l: coilcraft mss6132-8.2 h load current (ma) 1 0 efficiency (%) power loss (mw) 20 30 40 50 60 70 10 100 3522 g03 80 90 100 0 20 40 60 80 100 120 140 160 10 1000 burst mode operation burst mode power loss pwm mode v in = 4.2v v in = 2.7v l: coilcraft mss6132-8.2 h buck-boost switch r ds(0n) v in (v) 2.4 0 load current (ma) 5 15 20 25 50 35 3.4 4.4 4.9 3522 g04 10 40 45 30 2.9 3.9 5.4 v out = 1.2v v out = 1.8v v out = 2.5v l = 4.7 h temperature ( c) C40 r ds(on) (m ) 200 250 300 120 3522 g05 150 100 0 0 40 80 C20 20 60 100 50 400 pmos (switches a and d) nmos (switches b and c) 350 temperature ( c) C40 r ds(on) (m ) 400 500 120 3522 g06 300 200 0 0 40 80 C20 20 60 100 100 600 pmos nmos temperature ( c) C50 C10 change from 25 c (%) C8 C4 C2 0 10 4 C10 30 50 3522 g07 C6 6 8 2 C30 10 70 90 110 switching frequency vs v in v in (v) 2.5 C10 change from v in = 3.6v (%) C8 C4 C2 0 10 4 3.4 4.4 4.9 3522 g08 C6 6 8 2 2.9 3.9 5.4 (t a = 25c unless otherwise noted)
ltc3522 5 3522fa buck-boost feedback voltage vs temperature typical performance characteristics buck feedback voltage vs temperature buck-boost maximum load current, burst mode operation no load quiescent current vs v in buck-boost burst to pwm transition buck load step, pwm mode, 5ma to 200ma temperature ( c) C40 change in feedback voltage from 20 c (%) 0.1 0.3 0.5 120 3522 g09 C0.1 C0.3 0 0.2 0.4 C0.2 C0.4 C0.5 0 C20 40 20 80 100 140 60 temperature ( c) C40 change in feedback voltage from 20 c (%) 0.1 0.3 0.5 120 3522 g09 C0.1 C0.3 0 0.2 0.4 C0.2 C0.4 C0.5 0 C20 40 20 80 100 140 60 v in (v) 2.4 0 maximum load current (ma) 10 30 40 50 4.4 90 3522 g11 20 3.4 2.9 4.9 5.4 3.9 60 70 80 v out = 3v v out = 5v l = 4.7 h buck-boost maximum load current, pwm mode v in (v) 2.4 0 load current (ma) 100 300 400 500 4.4 600 3522 g12 200 3.4 2.9 4.9 5.4 3.9 v out = 3.3v l = 4.7 h v out = 5v v in (v) 2.4 0 quiescent current ( a) 5 15 20 25 50 35 3.4 4.4 4.9 3522 g13 10 40 45 30 2.9 3.9 5.4 both converters enabled inductor current 200ma/div v out 100mv/div 50 s/div 3522 g14 v in = 3.6v v out = 3.3v l = 4.7 h c out = 4.7 f buck-boost load step, 0ma to 300ma inductor current 200ma/div v out 100mv/div 100 s/div 3522 g15 v in = 3.6v v out = 3v l = 4.7 h c out = 4.7 f inductor current 100ma/div v out 100mv/div 100 s/div 3522 g16 v in = 3.6v v out = 1.8v l = 4.7 h c out = 4.7 f buck load step, burst mode operation, 5ma to 200ma inductor current 100ma/div v out 100mv/div 100 s/div 3522 g17 v in = 3.6v v out = 1.8v l = 4.7 h c out = 4.7 f (t a = 25c unless otherwise noted)
ltc3522 6 3522fa pin functions fb2 (pin 1): feedback voltage for the buck converter de- rived from a resistor divider on the buck output voltage. the buck output voltage is given by the following equation where r1 is a resistor between fb2 and ground and r2 is a resistor between fb2 and the buck output voltage: vv r r out =+ ? 0 594 1 2 1 . pwm (pin 2): logic input used to choose between burst and pwm mode operation for both converters. this pin cannot be left ? oating. pwm = low: burst mode operation is enabled on both converters. the buck converter will operate in burst mode operation at light current but will automatically transition to pwm operation at higher currents. the buck converter can supply its maximum output current (200ma) in this mode. the buck-boost converter will operate in variable frequency mode and can only supply a reduced load current (typically 50ma). pwm = high: both converters are forced into low noise 1mhz pwm mode operation. the buck converter will remain at constant frequency operation until its mini- mum on-time is reached. the buck-boost converter will remain in pwm mode at all load currents. gnd (pin 3): small-signal ground used as a ground reference for the internal circuitry of the ltc3522. pgood2 (pin 4): this pin is an open-drain output which will only pull low if the buck converter is enabled and one or more of the following conditions occurs: the buck output voltage is out of regulation, the part is in overtemperature shutdown or the part is in undervoltage lockout. fb1 (pin 5): feedback voltage for the buck-boost con- verter derived from a resistor divider on the buck-boost output voltage. the buck-boost output voltage is given by the following equation where r1 is a resistor between fb1 and ground and r2 is a resistor between fb1 and the buck-boost output voltage: vv r r out =+ ? 11 2 1 pgood1 (pin 6): this pin is an open-drain output which will only pull low if the buck-boost converter is enabled and one or more of the following conditions occurs: the buck-boost output voltage is out of regulation, the part is in overtemperature shutdown, the part is in undervoltage lockout or the buck-boost converter is in current limit. see the operation section of this data sheet for details on the functionality of this pin in pwm mode. shdn1 (pin 7): buck-boost active-low shutdown pin. forcing this pin above 1.4v enables the buck-boost con- verter. forcing this pin below 0.4v disables the buck-boost converter. this pin cannot be left ? oating. pv in1 (pin 8): high current power supply connection used to supply switch a of the buck-boost converter. this pin should be bypassed by a 4.7f or larger ceramic capacitor. the bypass capacitor should be placed as close to the pin as possible and should have a short return path to ground. pins pv in1 and pv in2 must be connected together in the application circuit. pgnd2 (pin 9): high current ground connection for the buck-boost switch c. the pcb trace connecting this pin to ground should be made as short and wide as possible.
ltc3522 7 3522fa sw1b (pin 10): buck-boost switch node that must be connected to one side of the buck-boost inductor. sw1a (pin 11): buck-boost switch node that must be connected to one side of the buck-boost inductor. v out1 (pin 12): buck-boost output voltage node. this pin should be connected to a low esr output capacitor. the capacitor should be placed as close to the ic as possible and should have a short return to ground. pgnd1 (pin 13): high current ground connection for buck-boost switch b and the buck converter synchronous recti? er. the pcb trace connecting this pin to ground should be made as short and wide as possible. sw2 (pin 14): buck converter switch node that must be connected to the buck inductor. pv in2 (pin 15): high current power supply connection used to supply the buck converter power switch. in ad- dition this pin is the supply pin for the internal circuitry of the ltc3522. this pin should be bypassed by a 4.7f or larger ceramic capacitor. the bypass capacitor should be placed as close to the pin as possible and should have a short return path to ground. pins pv in1 and pv in2 must be connected together in the application circuit. shdn2 (pin 16): buck active-low shutdown pin. forcing this pin above 1.4v enables the buck converter. forcing this pin below 0.4v disables the buck converter. this pin cannot be left ? oating. exposed pad (pin 17): the exposed pad must be electri- cally connected to ground. pins pgnd1, pgnd2, gnd, and the exposed pad must be connected together in the application circuit. pin functions
ltc3522 8 3522fa block diagram + C + C pgood1 v out1 6 12 fb1 shdn1 filter reverse i limit forward i limit pgood2 4 13 0.9v 0.85a + C 0.250a + C 0a i zero buck-boost pwm logic gate drives gate drives buck pwm logic bandgap reference and ot shutdown oscillator uvlo 1.00v soft-start ramp + + C soft-start ramp 7 pwm 2 shdn2 5 d v out1 10 sw1b 11 sw1a 8 pv in1 * 15 pv in2 * internal v cc c b a pgnd2 pgnd1 pgnd1 zero crossing 14 sw2 fb2 + C 0a + C + C 0.4a i limit 0.548v 3522 bd 0.594v g m pgnd1 3 gnd *pv in1 and pv in2 must be connected together in the application. 9 pgnd2 slope compensation + + C 1 + + C 16 1.00v 0.594v 0.9v 0.548v
ltc3522 9 3522fa operation the ltc3522 combines a synchronous buck dc/dc converter and a 4-switch buck-boost dc/dc converter in a single 3mm 3mm qfn package. the buck-boost converter utilizes a proprietary switching algorithm which allows its output voltage to be regulated above, below or equal to the input voltage. the buck converter provides a high ef? ciency lower voltage output and supports 100% duty cycle operation to extend battery life. in burst mode operation, the combined quiescent current for both con- verters is reduced to 25a. both converters operate from the same internal 1mhz oscillator. buck converter operation pwm mode operation when the pwm pin is held high, the ltc3522 buck con- verter uses a constant frequency, current mode control architecture. both the main (p-channel mosfet) and synchronous recti? er (n-channel mosfet) switches are internal. at the start of each oscillator cycle, the p-chan- nel switch is turned on and remains on until the current waveform with superimposed slope compensation ramp exceeds the error ampli? er output. at this point, the syn- chronous recti? er is turned on and remains on until the inductor current falls to zero or a new switching cycle is initiated. as a result, the buck converter operates with discontinuous inductor current at light loads which im- proves ef? ciency. at extremely light loads, the minimum on-time of the main switch will be reached and the buck converter will begin turning off for multiple cycles in order to maintain regulation. burst mode operation when the pwm pin is forced low, the buck converter will automatically transition between burst mode operation at suf? ciently light loads (below approximately 10ma) and pwm mode at heavier loads. burst mode entry is determined by the peak inductor current and therefore the load current at which burst mode operation will be entered depends on the input voltage, the output voltage and the inductor value. typical curves for burst mode entry threshold are provided in the typical performance characteristics section of this data sheet. under dropout and near dropout conditions, burst mode operation will not be entered. dropout operation as the input voltage decreases to a value approaching the output regulation voltage, the duty cycle increases toward the maximum on-time. further reduction of the supply voltage will force the main switch to remain on for more than one cycle until 100% duty cycle operation is reached where the main switch remains on continuously. in this dropout state, the output voltage will be determined by the input voltage less the resistive voltage drop across the main switch and series resistance of the inductor. slope compensation current mode control requires the use of slope compensa- tion to prevent sub-harmonic oscillations in the inductor current waveform at high duty cycle operation. this is ac- complished internally on the ltc3522 through the addition of a compensating ramp to the current sense signal. in some current mode ics, current limiting is performed by clamping the error ampli? er voltage to a ? xed maximum. this leads to a reduced output current capability at low step-down ratios. in contrast, the ltc3522 performs cur- rent limiting prior to addition of the slope compensation ramp and therefore achieves a peak inductor current limit that is independent of duty cycle. short-circuit protection when the output is shorted to ground, the error ampli? er will saturate high and the p-channel mosfet switch will turn on at the start of each cycle and remain on until the current limit trips. during this minimum on-time, the in- ductor current will increase rapidly and will decrease very slowly during the remainder of the period due to the very small reverse voltage produced by a hard output short. to eliminate the possibility of inductor current runaway in this situation, the buck converter switching frequency is reduced to approximately 250khz when the voltage on fb2 falls below 0.3v.
ltc3522 10 3522fa soft-start the buck converter has an internal voltage mode soft-start circuit with a nominal duration of 600s. the converter remains in regulation during soft-start and will therefore respond to output load transients which occur during this time. in addition, the output voltage rise time has minimal dependency on the size of the output capacitor or load current. error ampli? er and compensation the lt3522 buck converter utilizes an internal transcon- ductance error ampli? er. compensation of the feedback loop is performed internally to reduce the size of the application circuit and simplify the design process. the compensation network has been designed to allow use of a wide range of output capacitors while simultaneously ensuring rapid response to load transients. pgood2 comparator the pgood2 pin is an open-drain output which indicates the status of the buck converter. if the buck output volt- age falls 7.7% below the regulation voltage, the pgood2 open-drain output will pull low. the output voltage must rise 2.5% above the falling threshold before the pull-down will turn off. in addition, there is a 60s typical deglitch- ing delay in the ? ag in order to prevent false trips due to voltage transients on load steps. the pgood2 output will also pull low during overtemperature shutdown and undervoltage lockout to indicate these fault conditions. the pgood2 output is only active if the buck converter is enabled. buck-boost converter operation pwm mode operation when the pwm pin is held high, the ltc3522 buck-boost converter operates in a constant frequency pwm mode with voltage mode control. a proprietary switching algorithm allows the converter to switch between buck, buck-boost and boost modes without discontinuity in inductor cur- rent or loop characteristics. the switch topology for the buck-boost converter is shown in figure 1. when the input voltage is signi? cantly greater than the output voltage, the buck-boost converter operates in buck mode. switch d turns on continuously and switch c remains off. switches a and b are pulse width modu- lated to produce the required duty cycle to support the output regulation voltage. as the input voltage decreases, switch a remains on for a larger portion of the switching cycle. when the duty cycle reaches approximately 85%, the switch pair ac begins turning on for a small fraction of the switching period. as the input voltage decreases further, the ac switch pair remains on for longer durations and the duration of the bd phase decreases proportionally. as the input voltage drops below the output voltage, the ac phase will eventually increase to the point that there is no longer any bd phase. at this point, switch a remains on continuously while switch pair cd is pulse width modu- lated to obtain the desired output voltage. at this point, the converter is operating solely in boost mode. this switching algorithm provides a seamless transition between operating modes and eliminates discontinuities in average inductor current, inductor current ripple, and loop transfer function throughout all three operational modes. these advantages result in increased ef? ciency and stability in comparison to the traditional 4-switch buck-boost converter. error ampli? er and compensation the buck-boost converter utilizes a voltage mode error ampli? er with an internal compensation network as shown in figure 2. notice that resistor r2 of the external resistor divider network plays an integral role in determining the frequency operation l d pgnd2 pgnd1 ltc3522 a sw1a sw1b bc 3522 f01 v out1 pv in1 figure 1. buck-boost switch topology
ltc3522 11 3522fa response of the compensation network. the ratio of r2 to r1 must be set to program the desired output voltage but this still allows the value of r2 to be adjusted to optimize the transient response of the converter. increasing the value of r2 generally leads to greater stability at the expense of reduced transient response speed. increasing the value of r2 can yield substantial transient response improvement in cases where the phase margin has been reduced due to the use of a small value output capacitor or a large inductance (particularly with large boost step-up ratios). conversely, decreasing the value of r2 increases the loop bandwidth which can improve the speed of the converters transient response. this can be useful in improving the transient response if a large valued output capacitor is utilized. in this case, the increased bandwidth created by decreasing r2 is used to counteract the reduced converter bandwidth caused by the large output capacitor. current limit operation the buck-boost converter has two current limit circuits. the primary current limit is an average current limit circuit which injects an amount of current into the feedback node which is proportional to the extent that the switch a cur- rent exceeds the current limit value. due to the high gain of this loop, the injected current forces the error ampli? er output to decrease until the average current through switch a decreases approximately to the current limit value. the average current limit utilizes the error ampli? er in an ac- tive state and thereby provides a smooth recovery with little overshoot once the current limit fault condition is removed. since the current limit is based on the average current through switch a, the peak inductor current in current limit will have a dependency on the duty cycle (i.e., on the input and output voltages in the overcurrent condition). the speed of the average current limit circuit is limited by the dynamics of the error ampli? er. on a hard output short, it would be possible for the inductor current to increase substantially beyond current limit before the average cur- rent limit circuit would react. for this reason, there is a second current limit circuit which turns off switch a if the current ever exceeds approximately 165% of the average current limit value. this provides additional protection in the case of an instantaneous hard output short. reverse current limit the reverse current comparator on switch d monitors the inductor current entering v out1 . when this current exceeds 250ma (typical) switch d will be turned off for the remainder of the switching cycle. burst mode operation with the pwm pin held low, the buck-boost converter operates utilizing a variable frequency switching algorithm designed to improve ef? ciency at light load and reduce the standby current at zero load. in burst mode operation, the inductor is charged with ? xed peak amplitude current pulses. these current pulses are repeated as often as necessary to maintain the output regulation voltage. the typical output current which can be supplied in burst mode operaton is dependent upon the input and output voltage as given by the following formula: i v vv a out max burst in in out (), .? = + () 011 in burst mode operation, the error ampli? er is not used but is instead placed in a low current standby mode to reduce supply current and improve light load ef? ciency. soft-start the buck-boost converter has an internal voltage mode soft-start circuit with a nominal duration of 600s. the converter remains in regulation during soft-start and will therefore respond to output load transients that occur during this time. in addition, the output voltage rise time operation 1v gnd v out1 ltc3522 v out fb1 r2 r1 3522 f02 + C figure 2. buck-boost error ampli? er and compensation
ltc3522 12 3522fa has minimal dependency on the size of the output capaci- tor or load. during soft-start, the buck-boost converter is forced into pwm operation regardless of the state of the pwm pin. pgood1 comparator the pgood1 pin is an open-drain output which indicates the status of the buck-boost converter. in burst mode operation (pwm = low), the pgood1 open-drain output will pull low when the output voltage falls 10% below the regulation voltage. there is approximately 2.5% hysteresis in this threshold when the output voltage is returning good. in addition, there is a 60s typical deglitching delay to prevent false trips due to short duration voltage transients in response to load steps. in pwm mode, operation of the pgood1 comparator is complicated by the fact that the feedback pin voltage is driven to the reference voltage independent of the output voltage through the action of the voltage mode error am- pli? er. since the soft-start is voltage mode, the feedback voltage will track the output voltage correctly during soft-start, and the pgood1 output will correctly indicate the point at which the buck-boost attains regulation at the end of soft-start. therefore, the pgood1 output can be utilized for sequencing purposes. once in regulation, the feedback voltage will no longer track the output voltage and the pgood1 pin will not directly respond to a loss of regulation in the output. however, the only means by which a loss of regulation can occur is if the current limit has been reached thereby preventing the buck-boost converter from delivering the required output current. operation in such cases, the occurrence of current limit will cause the pgood1 ? ag to fall indicating a fault state. there can be cases, however, when the buck-boost converter is continuously in current limit, causing the pgood1 output to pull low, but the output voltage still remains slightly above the pgood1 comparator trip point. the pgood1 output also pulls low during overtemperature shutdown and undervoltage lockout. the pgood1 output is only active if the buck-boost converter is enabled. common functions thermal shutdown if the die temperature exceeds 150c (typical) both con- verters will be disabled. all power devices will be turned off and all switch nodes will be high impedance. the soft-start circuits for both converters are reset during thermal shutdown to provide a smooth recovery once the overtemperature condition is eliminated. both converters will restart (if enabled) when the die temperature drops to approximately 140c. undervoltage lockout if the supply voltage decreases below 2.3v (typical) then both converters will be disabled and all power devices will be turned off. the soft-start circuits for both converters are reset during undervoltage lockout to provide a smooth restart once the input voltage rises above the undervoltage lockout threshold.
ltc3522 13 3522fa applications information the basic ltc3522 application circuit is shown as the typical application on the front page of this data sheet. the external component selection is determined by the desired output voltages, output currents and ripple voltage requirements of each particular application. however, basic guidelines and considerations for the design process are provided in this section. buck inductor selection the choice of buck inductor value in? uences both the ef- ? ciency and the magnitude of the output voltage ripple. larger inductance values will reduce inductor current ripple and will therefore lead to lower output voltage ripple. for a ? xed dc resistance, a larger value inductor will yield higher ef? ciency by lowering the peak current to be closer to the average. however, a larger value inductor within the same family will generally have a greater series resistance, thereby offsetting this ef? ciency advantage. given a desired peak to peak current ripple, i l , the required inductance can be calculated via the following expression, where f represents the switching frequency in mhz: l fi v v v h l out out in = ? () 1 1 C a reasonable choice for ripple current is i l = 80ma which represents 40% of the maximum 200ma load current. the dc current rating of the inductor should be at least equal to the maximum load current plus half the ripple current in order to prevent core saturation and loss of ef? ciency during operation. to optimize ef? ciency the inductor should have a low series resistance. in particularly space restricted applications it may be advantageous to use a much smaller value inductor at the expense of larger ripple current. in such cases, the converter will operate in discontinuous conduction for a wider range of output loads and ef? ciency will be reduced. in addition, there is a minimum inductor value required to maintain stability of the current loop (given the ? xed internal slope compensation). speci? cally, if the buck converter is going to be utilized at duty cycles over 40%, the inductance value must be at least l min as given by the following equation: l min = 2.5 ? v out (h) table 1 depicts the minimum required inductance for several common output voltages. table 1. buck minimum inductance output voltage minimum inductance 0.6v 1.5h 0.8v 2.0h 1.2v 3.0h 2.0v 5.0h 2.7v 6.8h 3.3v 8.3h buck output capacitor selection a low esr output capacitor should be utilized at the buck output in order to minimize voltage ripple. multi-layer ceramic capacitors are an excellent choice as they have low esr and are available in small footprints. in addition to controlling the ripple magnitude, the value of the output capacitor also sets the loop crossover frequency and there- fore can impact loop stability. there is both a minimum and maximum capacitance value required to ensure stability of the loop. if the output capacitance is too small, the loop cross-over frequency will increase to the point where switching delay and the high frequency parasitic poles of the error ampli? er will degrade the phase margin. in addition, the wider bandwidth produced by a small output capacitor will make the loop more susceptible to switch- ing noise. at the other extreme, if the output capacitor is too large, the cross-over frequency can decrease too far below the compensation zero and also lead to degraded phase margin. table 2 provides a guideline for the range of allowable values of low esr output capacitors. larger value output capacitors can be accommodated provided they have suf? cient esr to stabilize the loop or by increas- ing the value of the feedforward capacitor in parallel with the upper resistor divider resistor.
ltc3522 14 3522fa table 2. buck output capacitor range v out c min c max 0.6v 15f 300f 0.8v 15f 230f 1.2v 10f 150f 1.8v 6.8f 90f 2.7v 6.8f 70f 3.3v 6.8f 50f buck input capacitor selection the pv in2 pin provides current to the buck converter power switch and is also the supply pin for the ics inter- nal circuitry. it is recommended that a low esr ceramic capacitor with a value of at least 4.7f be used to bypass this pin. the capacitor should be placed as close to the pin as possible and have a short return to ground. buck output voltage programming the output voltage is set by a resistive divider according to the following formula: vv r r out =+ ? 0 594 1 2 1 . the external divider is connected to the output as shown in figure 3. it is recommended that a feedforward capacitor, c ff , be placed in parallel with resistor r2 in order to improve the noise immunity of the feedback node. table 3 provides the recommended resistor and feedforward capacitor combinations for common output voltage options. table 3. buck resistor divider values v out r1 r2 c ff 0.6v C 0 C 0.8v 200k 69.8k 12pf 1.0v 118k 80.6k 12pf 1.2v 100k 102k 12pf 1.5v 78.7k 121k 12pf 1.8v 68.1k 137k 12pf 2.7v 63.4k 226k 18pf 3.3v 60.4k 274k 20pf buck-boost output voltage programming the buck-boost output voltage is set by a resistive divider according to the following formula: vv r r out =+ ? 11 2 1 the external divider is connected to the output as shown in figure 4. the buck-boost converter utilizes voltage mode control and the value of r2 plays an integral role in the dynamics of the feedback loop. in general, a larger value for r2 will increase stability and reduce the speed of the transient response. a smaller value of r2 will reduce stability but increase the transient response speed. a good starting point is to choose r2 = 1m, and then calculate the required value of r1 to set the desired output voltage according to the formula given above. if a large output capacitor is used, the bandwidth of the converter is reduced. in such cases r2 can be reduced to improve the transient applications information ltc3522 gnd 0.6v v out 5.25v fb2 r1 3522 f03 r2 c ff figure 3. setting the buck output voltage ltc3522 gnd 2.2v v out 5.25v fb1 r1 3522 f04 r2 figure 4. setting the buck-boost output voltage
ltc3522 15 3522fa response. if a large inductor or small output capacitor is utilized the loop will be less stable and the phase margin can be improved by increasing the value of r2. buck-boost inductor selection to achieve high ef? ciency, a low esr inductor should be utilized for the buck-boost converter. the inductor must have a saturation rating greater than the worst case average inductor current plus half the ripple current. the peak-to- peak inductor current ripple will be larger in buck and boost mode than in the buck-boost region. the peak-to-peak inductor current ripple for each mode can be calculated from the following formulas, where f is the frequency in mhz and l is the inductance in h: i fl vvv v i lp out in out in lp , , ? C -p,buck -p,b = () 1 o oost = () 1 fl vv v v in out in out ? C in addition to affecting output current ripple, the size of the inductor can also affect the stability of the feedback loop. in boost mode, the converter transfer function has a right half plane zero at a frequency that is inversely proportional to the value of the inductor. as a result, a large inductor can move this zero to a frequency that is low enough to degrade the phase margin of the feedback loop. it is recommended that the inductor value be chosen less than 10h if the buck-boost converter is to be used in the boost region. buck-boost output capacitor selection a low esr output capacitor should be utilized at the buck- boost converter output in order to minimize output voltage ripple. multi-layer ceramic capacitors are an excellent choice as they have low esr and are available in small footprints. the capacitor should be chosen large enough to reduce the output voltage ripple to acceptable levels. neglecting the capacitor esr and esl, the peak-to-peak output voltage ripple can be calculated by the following formulas, where f is the frequency in mhz, c out is the capacitance in f, l is the inductance in h and i load is the output current in amps: v ivv cvf v load out in out out p-p(boost) p- = () C ?? p p(buck) = () 1 8 2 ?? ? ? C lc f vv v v out in out out in since the output current is discontinuous in boost mode, the ripple in this mode will generally be much larger than the magnitude of the ripple in buck mode. in addition to controlling the ripple magnitude, the value of the output capacitor also affects the location of the resonant frequency in the open loop converter transfer function. if the output capacitor is too small, the bandwidth of the converter will extend high enough to degrade the phase margin. to prevent this from happening, it is recommended that a minimum value of 4.7f be used for the buck-boost output capacitor. buck-boost input capacitor selection the supply current to the buck-boost converter is provided by the pv in1 pin. it is recommended that a low esr ceramic capacitor with a value of at least 4.7f be located as close to this pin as possible. inductor style and core material different inductor core materials and styles have an impact on the size and price of an inductor at any given peak current rating. toroid or shielded pot cores in ferrite or permalloy materials are small and reduce emissions, but generally cost more than powdered iron core inductors with similar electrical characteristics. the choice of inductor style depends upon the price, sizing, and emi requirements of a particular application. table 4 provides a sampling applications information
ltc3522 16 3522fa applications information of inductors that are well suited to many ltc3522 buck converter applications. table 4. representative surface mount inductors manufacturer part number value max current dcr height taiyo yuden np035b-4r7m 4.7h 1.2a 0.047 1.8mm np035b-6r8m 6.8h 1.0a 0.084 1.8mm coilcraft mss6132-472ml 4.7h 1.8a 0.056 3.2mm mss6132-822ml 8.2h 1.35a 0.070 3.2mm sumida cdrh2d14np- 4r7n 4.7h 1.0a 0.135 1.55mm cdrh2d18/ hpnp-4r7n 4.7h 1.2a 0.110 2.0mm cdrh3d16np- 4r7n 4.7h 0.9a 0.08 1.8mm cooper- bussmann sd18-4r7 4.7h 1.54a 0.082 1.8mm sd10-4r7 4.7h 1.08a 0.153 1.0mm capacitor vendor information both the input and output capacitors used with the ltc3522 must be low esr and designed to handle the large ac cur- rents generated by switching converters. the vendors in table 5 provide capacitors that are well suited to ltc3522 application circuits. table 5. capacitor vendor information manufacturer web site representative part numbers taiyo yuden www.t-yuden.com jmk107bj105ma 4.7f, 6.3v tdk www.component. tdk.com c2012x5r0j475k 4.7f, 6.3v murata www.murata.com grm219r61a475k 4.7f avx www.avxcorp.com sm055c475khn480 4.7f pcb layout considerations the ltc3522 switches large currents at high frequencies. special care should be given to the pcb layout to ensure stable, noise-free operation. figure 5 depicts the recom- mended pcb layout to be utilized for the ltc3522. a few key guidelines follow: 1. all circulating high current paths should be kept as short as possible. this can be accomplished by keeping the routes to all bold components in figure 5 as short and as wide as possible. capacitor ground connections should via down to the ground plane in the shortest route possible. the bypass capacitors on pv in1 and pv in2 should be placed as close to the ic as possible and should have the shortest possible paths to ground. 2. the small-signal ground pad (gnd) should have a single point connection to the power ground. a convenient way to achieve this is to short the pin directly to the exposed pad as shown in figure 5. 3. the components shown in bold and their connections should all be placed over a complete ground plane. 4. to prevent large circulating currents from disrupting the output voltage sensing, the ground for each resistor divider should be returned directly to the small signal ground pin (gnd). 5. use of vias in the die attach pad will enhance the ther- mal environment of the converter especially if the vias extend to a ground plane region on the exposed bottom surface of the pcb. 6. keep the connection from the resistor dividers to the feedback pins fb1 and fb2 as short as possible and away from the switch pin connections.
ltc3522 17 3522fa applications information shdn2 (16) sw2 (14) pgnd1 (14) pv in2 (15) shdn1 (7) pv in1 (8) pgood1 (6) fb2 (1) pwm (2) gnd (3) pgood2 (4) v out1 (12) sw1a (11) sw1b (10) pgnd2 (9) fb1 (5) buck v out buck-boost v out via to ground plane via to ground plane 3522 f05 kelvin to v out pad kelvin to v out pad uninterrupted ground plane must exist under all components shown in bold and under traces connecting to those components direct tie back to gnd pin minimize trace length minimize trace length figure 5. ltc3522 recommended pcb layout
ltc3522 18 3522fa typical application li-ion to 3v at 400ma and 1.2v at 200ma + pv in1 pv in2 sw2 fb2 v out1 ltc3522 pgood2 1m 102k 12pf 100k c2 4.7 f c1 10 f c3 4.7 f li-ion l2 4.7 h l1 6.8 h v out1 3v 300ma (400ma, v in > 3v) c1: murata grm219r61a475k (0805 package) c2, c3: murata grm21br60j106k (0805 package) l1: taiyo yuden npo35b-6r8m l2: taiyo yuden npo35b-4r7m v out2 1.2v 200ma combined pgood output v in 2.4v to 4.2v 499k 3522 ta02 pgood1 pwm sw1a sw1b fb1 shdn2 shdn1 pgnd1 gnd1 pgnd2 499k on off pwm burst buck-boost converter ef? ciency vs load current buck converter ef? ciency vs load current load current (ma) 1 20 efficiency (%) 30 40 50 60 70 10 100 3522 ta02b 80 90 100 1000 v in = 4.2v v in = 2.7v burst mode operation pwm mode load current (ma) 1 30 efficiency (%) 40 50 60 70 10 100 3522 ta02c 80 90 100 1000 v in = 4.2v v in = 2.7v burst mode operation pwm mode
ltc3522 19 3522fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description ud package 16-lead plastic qfn (3mm 3mm) (reference ltc dwg # 05-08-1691) 3.00 0.10 (4 sides) recommended solder pad pitch and dimensions 1.45 0.05 (4 sides) note: 1. drawing conforms to jedec package outline mo-220 variation (weed-2) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 bottom viewexposed pad 1.45 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 1 pin 1 notch r = 0.20 typ or 0.25 45 chamfer 15 16 2 0.50 bsc 0.200 ref 2.10 0.05 3.50 0.05 0.70 0.05 0.00 C 0.05 (ud16) qfn 0904 0.25 0.05 0.50 bsc package outline
ltc3522 20 3522fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2007 lt 0807 rev a ? printed in usa related parts part number description comments ltc3410/ltc3410b 300ma (i out ), 2.25mhz synchronous buck dc/dc converter v in : 2.5v to 5.5v, v out(range) = 0.8v to v in , i q = 26a, i sd < 1a, sc70 package ltc3440 600ma (i out ), 2mhz synchronous buck-boost dc/dc converter v in : 2.5v to 5.5v, v out(range) = 2.5v to 5.5v, i q = 25a, i sd < 1a, ms, dfn packages ltc3441 600ma (i out ), 2mhz synchronous buck-boost dc/dc converter v in : 2.5v to 5.5v, v out(range) = 2.4v to 5.25v, i q = 25a, i sd < 1a, dfn package ltc3442 1.2a (i out ), 2mhz synchronous buck-boost dc/dc converter v in : 2.4v to 5.5v, v out(range) = 2.4v to 5.25v, i q = 35a, i sd < 1a, dfn package ltc3455 dual dc/dc converter with usb power manager and li-ion battery charger 96% ef? ciency, seamless transition between inputs, i q = 110a, i sd < 2a, qfn package ltc3456 2-cell multi-output dc/dc converter with usb power manager 92% ef? ciency, seamless transition between inputs, i q = 180a, i sd < 1a, qfn package ltc3530 600ma (i out ), 2mhz synchronous buck-boost dc/dc converter v in : 1.8v to 5.5v, v out(range) = 1.8v to 5.5v, i q = 40a, i sd < 1a, dfn, msop packages ltc3532 500ma (i out ), 2mhz synchronous buck-boost dc/dc converter v in : 2.4v to 5.5v, v out(range) = 2.4v to 5.25v, i q = 35a, i sd < 1a, dfn, msop packages ltc3544/ltc3544b 300ma, 200ma 2, 100ma, 2.25mhz quad output synchronous step-down dc/dc converter v in : 2.25v to 5.5v, v out(min) = 0.8v, i q = 70a, i sd < 1a, 3mm 3mm qfn packages typical application 3v at 400ma and 1.8v at 200ma with sequenced start-up + pv in1 pv in2 sw2 fb2 v out1 ltc3522 pgood2 1m 137k 12pf 68.1k c2 4.7 f c1 6.8 f c3 4.7 f li-ion l2 4.7 h l1 8.2 h v out1 3v 300ma (400ma, v in > 3v) c1: tdk c3216x5r0j685m c2, c3: taiyo yuden jmk212bj106mg l1: cooper bussmann sd18-8r2 l2: cooper bussmann sd18-4r7 v out2 1.8v 200ma pgood1 v in 2.4v to 4.2v 499k 499k 3522 ta03a pgood1 pwm sw1a sw1b fb1 shdn2 shdn1 pgnd1 gnd1 pgnd2 499k on off pwm burst v out2 1v/div v out1 2v/div pgood2 5v/div pgood1 5v/div 200 s/div 3522 ta03b sequenced start-up waveforms

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